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Nexperia PUMD2 115 double transistor NPN PNP resistor equipped with bias resistors in SOT363 package

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Nexperia PUMD2 115 double transistor NPN PNP resistor equipped with bias resistors in SOT363 package

Output Voltage(VO(on)) : -

Input Resistor : 22kΩ

Resistor Ratio : 1

Collector - Emitter Voltage VCEO : 50V

Description : Pre-Biased Bipolar Transistor (BJT) 1 NPN Pre-Biased, 1 PNP Pre-Biased 50V 100mA 300mW Surface Mount TSSOP-6(SOT-363)

Mfr. Part # : PUMD2,115

Model Number : PUMD2,115

Package : TSSOP-6(SOT-363)

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Product Overview

The Nexperia PUMD2 is a resistor-equipped double transistor (RET) featuring both NPN and PNP configurations within a single SOT363 (SC-88) SMD plastic package. It offers a 100 mA output current capability and incorporates built-in bias resistors, which simplify circuit design, reduce component count, and lower pick-and-place costs. This device is suitable for low current peripheral driving, controlling IC inputs, and replacing general-purpose transistors in digital applications.

Product Attributes

  • Brand: Nexperia
  • Package Type: SOT363 (SC-88)
  • Configuration: NPN/PNP Resistor-Equipped Double Transistor (RET)

Technical Specifications

Symbol Parameter Conditions Min Typ Max Unit
Per transistor
VCEO Collector-emitter voltage open base [1] - - 50 V
IO Output current [1] - - 100 mA
R1 Bias resistor 1 (input) [2] 15.4 22 28.6 k
R2/R1 Bias resistor ratio [2] 0.8 1 1.2 -
VCBO Collector-base voltage open emitter [1] - - 50 V
VEBO Emitter-base voltage open collector [1] - - 10 V
VI (TR1 NPN) Input voltage -10 - 40 V
VI (TR2 PNP) Input voltage -40 - 10 V
Ptot Total power dissipation Tamb 25 C [2] - - 200 mW
Rth(j-a) Thermal resistance junction to ambient in free air [1] - - 625 K/W
V(BR)CBO Collector-base breakdown voltage IC = 100 A; IE = 0 A; Tamb = 25 C [1] 50 - - V
V(BR)CEO Collector-emitter breakdown voltage IC = 2 mA; IB = 0 A; Tamb = 25 C [1] 50 - - V
ICBO Collector-base cut-off current VCB = 50 V; IE = 0 A; Tamb = 25 C [1] - - 100 nA
ICEO Collector-emitter cut-off current VCE = 30 V; IB = 0 A; Tamb = 25 C [1] - - 100 nA
ICEO Collector-emitter cut-off current VCE = 30 V; IB = 0 A; Tj = 150 C [1] - - 5 A
IEBO Emitter-base cut-off current VEB = 5 V; IC = 0 mA; Tamb = 25 C [1] - - 180 A
hFE DC current gain VCE = 5 V; IC = 5 mA; Tamb = 25 C [1] 60 - - -
VCEsat Collector-emitter saturation voltage IC = 10 mA; IB = 0.5 mA; Tamb = 25 C [1] - - 150 mV
VI(off) Off-state input voltage VCE = 5 V; IC = 100 A; Tamb = 25 C [1] - 1.1 0.8 V
VI(on) On-state input voltage VCE = 0.3 V; IC = 5 mA; Tamb = 25 C 2.5 1.7 - V
Cc (TR1 NPN) Collector capacitance VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 C - - 2.5 pF
fT (TR1 NPN) Transition frequency VCE = 5 V; IC = 10 mA; f = 100 MHz; Tamb = 25 C [3] - 230 - MHz
Cc (TR2 PNP) Collector capacitance VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 C - - 3 pF
fT (TR2 PNP) Transition frequency VCE = -5 V; IC = -10 mA; f = 100 MHz; Tamb = 25 C [3] - 180 - MHz
Per device
Ptot Total power dissipation Tamb 25 C [2] - - 300 mW
Rth(j-a) Thermal resistance junction to ambient in free air [1] - - 417 K/W
General
R1 Bias resistor 1 (input) [2] 15.4 22 28.6 k
R2/R1 Bias resistor ratio [2] 0.8 1 1.2 -
Package TSSOP6 (SOT363)
Body dimensions 2.1 x 1.25 x 0.95 mm
Pitch 0.65 mm

[1] For the PNP transistor with negative polarity.

[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 m copper, tin-plated and standard footprint.

[3] Characteristics of built-in transistor.


2504101957_Nexperia-PUMD2-115_C426874.pdf


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